Matthew I. Campbell
Cristina H. Amon
Jonathan Cagan
Department of Mechanical Engineering
and
Engineering Design Research Center
Carnegie Mellon University
Pittsburgh, PA
This work introduces an algorithm that uses simulated annealing to perform electronic component layout while incorporating constraints related to thermal performance. A hierarchical heat transfer analysis is developed which is used in conjunction with the simulated annealing algorithm to produce final layout configurations that are densely packed and operate within specified temperature ranges. Examples of three-dimensional component placement test cases are presented including an application to embedded wearable computers.